1. Field of the Invention
The present invention relates to a line driver, and more specifically, to a line driver capable of controlling the slew rate or waveform of output signals.
2. Description of the Prior Art
As the requirements of computer networks and data communication increase, data transmission has been improved in cooperation with technologies in communication system, signal processing, and very large-scale integration (VLSI). The appearance of VLSI allows more digital processing systems and analog front-end blocks to be integrated onto a single chip so that the cost can be lowered and be more competitive. Since the analog front-end blocks are integrated into a digital circuit, a lower voltage source is required in accordance with the minimization of VLSI. As voltage sources have become lower and lower, it becomes more difficult to satisfy the requirements in operation speed, signal amplitude, and linearity of an analog circuit.
A general communication system utilizes a transceiver for data transmission. The transceiver includes a line driver for transmitting output signals to different loads of impedance including capacitive and resistive impedances. In addition, the line driver is required to sustain transmission in high linearity. Therefore, the line driver needs to be capable of driving different kinds of impedance loads while lowering harmonic distortion as much as possible. The line driver is also required to keep the output amplitude with an acceptable dynamic range. In order to fulfill those requirements of the output signals of the line driver on rail-to-rail output amplitude and the requirements of high output currents on quiescent current ratio, the line driver generally utilizes complimentary class-AB output stage. In general, the class-AB output stage utilizes two complementary head-to-tail transistors to conduct a level shift between the gate voltages of output transistors. Another preferred method is to adjust the quiescent current to make an optimal balance between speed and power without requiring the redesign of part of the circuit, for example, detecting signal cross and corresponding complementary quiescent current from clock information converted from output signals.
As described above, the transceiver outputs signals to a transmission line via the line driver; thus the slew rate, rising time, and falling time of the output signals of the line driver is limited because of the transceiver. Since the load of the line driver may be very large, if there is no slew rate control, it is hardly possible for output signals to comply with the standard required because of the operation, the power source, and the temperature variation. Although most of the line drivers apply such kind of slew rate control, it is disadvantageous in that the circuit is too complicated or that the slew rate cannot be precisely controlled. Moreover, in some slew rate control, matching currents are required because mismatch between current sources may cause unbalance signal waveform.